■

unsigned char ctrl[3]={0x12,0x34,0x55};

void ctl_output()
{
	unsigned char i;


	SCLR_LOW;
	udelay(2);
	SCLR_HIGH;
	udelay(2);



	// CLEAR

	OUTPUT_LOW;
	S_CLK_LOW;
	S_DATA_LOW;
	CLK_LOW;

	for (i=0 ; i < 8 ; i++)  
	{
		CLK_LOW;

		if ( ctrl[0] & (0x01<<i) ) 
			S_DATA_LOW;
		else 
			S_DATA_HIGH;

		//register shifts bits on upstroke of clock pin  
		CLK_HIGH;
		//zero the data pin after shift to prevent bleed through
		S_DATA_LOW;
	}
	CLK_LOW;



	for (i=0 ; i < 8 ; i++)  
	{
		CLK_LOW;

		if ( ctrl[1] & (0x01<<i) ) 
			S_DATA_LOW;
		else 
			S_DATA_HIGH;

		//register shifts bits on upstroke of clock pin  
		CLK_HIGH;
		//zero the data pin after shift to prevent bleed through
		S_DATA_LOW;
	}
	CLK_LOW;



	for (i=0 ; i < 8 ; i++)  
	{
		CLK_LOW;

		if ( ctrl[2] & (0x01<<i) ) 
			S_DATA_LOW;
		else 
			S_DATA_HIGH;

		//register shifts bits on upstroke of clock pin  
		CLK_HIGH;
		//zero the data pin after shift to prevent bleed through
		S_DATA_LOW;
	}
	CLK_LOW;
	S_CLK_HIGH;
	S_CLK_LOW;


}